5G continues to gain traction around the world. According to a new report from technology analyst PwC, 5G had achieved 75% coverage of the US in January 2021, and the percentage will soon rise to 80%.
While the proportion of devices actually using 5G is considerably lower—just about 12% in July 2021 according to PwC—a tipping point is expected to arrive in 2023, with usage rates increasing strongly and steadily as customers reach the tech refresh point in their mobile device upgrade cycles and mobile network operators (MNOs) solve their 5G deployment challenges.1
This is desirable because 5G holds such great promise. 5G is needed to enable new types of applications well beyond today’s voice communications and internet access services: powerful virtual and augmented reality applications that will only be practical when the internet of things (IoT) becomes more responsive and reliable.
As such, MNOs are looking for more effective ways to implement 5G technology. They will have to make choices regarding how to configure the architecture, implement virtualization, and manage their operations. For many MNOs, the right decision is to build out an Open RAN platform rather than to use a proprietary radio access network (RAN).
That is why Open RAN is gaining momentum. Open RAN is a series of standards managed by the O-RAN Alliance and 3GPP that supports disaggregation, open APIs, and multi-vendor interoperability, all attractive features for MNOs seeking to build flexible, responsive networks. It enables a new level of flexibility in network configuration, and supports multi-vendor deployments, which is why an extensive ecosystem2 of companies and products are now designing for the Open RAN environment. In addition, the fact that Open RAN is designed for building virtualized RAN (vRAN) systems enables RAN software to be run on commercial off-the-shelf (COTS) servers.
In previous cellular communications generations, RAN platforms included a baseband unit installed on a powerful server at a central facility to handle signal processing and to communicate with individual remote radio units (RRUs) installed at or near the cell tower. The RAN, including its RRUs, makes up the bulk of the cellular base station.
The Open RAN standard disaggregates the baseband unit into a centralized unit (CU) and one or more distributed units (DUs). The DU software handles real-time L1 and L2 scheduling functions, while the CU is responsible for non-real-time L2 and L3 processing. DU software can be installed on an Intel® architecture server at the cell site, or in an edge cloud data center. The CU software is likely to be installed in a regional cloud data center.
Silicom, an Intel® Network Builders ecosystem partner, offers a ready-made DU hardware platform called Palma, which is an Intel architecture-based, fully integrated DU platform, designed for OpenRAN environments. The appliance has the processor performance, optional acceleration, memory, and precise time synchronization needed to support even high-density DU deployments.
DU: The Basic Anatomy
While the CU manages high-layer functions, multiple DUs are deployed in a network to support lower layers of the protocol stack such as the radio link control (RLC) and medium access control (MAC).
To maintain connectivity and throughput, the choice of the RAN fronthaul interface is vital. This is usually a wired, but sometimes a wireless, network with control systems that connect the CU to the DUs, and the DUs to radio units (RUs), maintaining throughput and reliability between other components of the network.
5G networks are expected to require many more base stations and antennas than 4G because they operate at higher frequencies, which increases support for more devices but attenuates the wavelength of a given antenna, thus reducing its range. In cities, buildings and other structures can impede signals, requiring MNOs to deploy small cells along city streets and inside buildings to route signals around barriers.
The separation of the CU from the DU means that control data flows need precise time synchronization—on the order of microseconds or even nanoseconds—for coordination. Time synchronization ensures that data packets can move from one network element to the next smoothly and in the correct order.
Since the DU is a key to a fast, reliable network, MNOs must choose hardware wisely. It is possible to develop a customized DU hardware platform by selecting servers, processors, accelerators, fronthaul interfaces, and software separately, and then integrating them. This approach can enable some flexibility, but it is costly, time-consuming, requires significant integration, and increases the risk of inefficient operation.
Palma: 5G DU Hardware in a Box
Palma is Silicom’s DU hardware platform for high-density urban environments. It is a companion product to Silicom’s Vigo. While Vigo provides four slots for optional cards and runs on an Intel® Xeon® D processor, Palma provides six card slots and runs on 3rd generation Intel® Xeon® Scalable processors, with 8 to 36 cores depending on the chosen configuration.
3rd generation Intel® Xeon® Scalable processors feature PCIe Gen 4.0 connectivity, enhanced hardware-based security features, and hardware-enhanced data service delivery. These CPUs deliver improvements in I/O, memory, storage, and network technologies over previous generations.3
Several Intel technologies power key Palma security features, including the Trusted Platform Module, which securely stores keys, passwords, and digital certificates; hardware-based encryption through Intel® Software Guard Extensions; a solid-state drive with integrated encryption; and built-in Intel® QuickAssist Technology (Intel® QAT) cryptography accelerator on the motherboard.
Palma features 12 fixed ports of 10/25 GbE using the Intel® Ethernet Controller E810; support for additional networking ports and different technologies is possible via Silicom’s network adapter cards. Palma is designed to be installed in environments without climate control, with an operating range from -4 to 135 degrees F (-20 to 55 degrees C). It is optimized for edge computing services with a 1U and 2U-high rack-mounted form factor with a front panel I/O interface for RU connectivity.
Silicom Time Sync Solves Timing Issue
Precise synchronization timing is a significant technical challenge for 5G DU deployments. LTE networks, and even 5G networks on a frequency-divided (FDD) spectrum, can survive a loss of synchronization that exceeds an hour. However, 5G on a time division duplex (TDD) spectrum requires synchronization on the order of microseconds to prevent interference. For carrier aggregation and other use cases, the time synchronization accuracy has to be within 65 nanoseconds.
Palma supports Silicom Time Sync Technology (STS) through its I/O interface. Silicom STS is available in several configurations utilizing the Intel Ethernet Controller E810. STS offers Synchronous Ethernet (G.8261, G.8262) combined with IEEE 1588 precision time protocol (PTP). STS can serve as a transparent clock, boundary clock, and a grandmaster clock, accurate to the nanosecond level. It ensures synchronization within the physical and protocol layers.
Silicom offers several STS-enabled adapters for Palma including a 1/10 GbE card, a 10/25 GbE and a 25 GbE card.
RAN technologies and features rely on time sync levels of various accuracies. For example, the deployment of coordinated RAN features such as coordinated multi-point transmission (CoMP) requires a relative time sync of less than a microsecond between radios.4
To augment the built-in processing power provided by the 3rd generation Intel® Xeon® Scalable processor, MNOs can deploy a variety of combinations of accelerator cards in the six card slots that can be augmented or revamped as needs change. Silicom card options include:
- Oakham Network Adapter: The Silicom Oakham Adapter for 5G delivers high-performance and precise time synchronization and is based on the Intel® FPGA Programmable Acceleration Card N3000 utilizing Intel® Arria® 10 FPGA combined with the unique Silicom Time Sync (STS) technology.
- Lisbon ACC100 FEC network accelerator: The Lisbon ACC1005 offloads forward error correction (FEC) processing from the CPU, speeding up network throughput. The ACC100 is based on the Intel® eASIC™ N3XS device, a new class of configurable integrated circuit (IC) that balances the fast time-to-market of a field programmable gate array (FPGA) with the power-efficient, purpose-built performance of a custom-developed application specific integrated circuit (ASIC).
Silicom has tested Palma with FlexRAN for initial validation. The company further tested the unit with leading 5G software and operating systems from leading vendors, including Red Hat and VMWare. Palma is available now and ready for proof-of-concept implementations.
Why Time Synchronization Matters
In 3G and 4G networks, the necessary time synchronization features were built into the circuit-switched equipment on which they relied. Full packet-based voice and other real-time applications on 5G require highly accurate packet synchronization.
Synchronization ensures data packets flow from one network element to the next at a fast, steady rate and in the proper order. Packets can get out of order when they take alternate routes through the network. Time sync ensures packet order so that communications are undistorted and accurate.
The fact that RAN functionality in MNO 5G networks has become open and virtualized brings the potential for greater agility and lower costs, but the increased integration effort makes the selection of the right hardware platform—one that offers both performance and customization—crucial. Silicom’s Palma, an Open RAN platform based on open Intel technologies, is custom-designed to meet the real-time processing needs of 5G DUs. With a 3rd generation Intel® Xeon® Scalable processor and six expansion card slots, MNOs can configure Palma for a wide range of network deployments, including urban locations that need processing power for large groups of users. Silicom has designed Palma to be the choice of MNOs seeking a cost-effective self-contained server that bridges flexibility with simplicity.
Oakham FPGA Programmable Acceleration Card
Silicom Time Sync and Acceleration Adapters
Intel® Xeon® Scalable Processors