รุ่น BSDL ตระกูล FPGA ดั้งเดิม

{"limitDisplayedContent":"showAll","collectionRelationTags":{"relations":{"OR":["etm-93D6C1E9-86F4-4050-867E-B8CB6FD29CBE","etm-4A837A85-5B81-4257-8D2F-E362AA5EBDAD","etm-723AF675-9A1C-4025-AFB8-4F5020D9459F","etm-2A0209C8-C765-42AA-9843-23F064780884","etm-BBBBFCCE-4E18-4FF9-AF14-0F449CA57E7D","etm-0DA706B2-8DF7-4401-8051-9F6FE769517A","etm-6BC2C884-D706-4A7D-88A0-0FB76C54DF59","etm-0DEC841F-13F9-4919-89FA-655A06A79446","etm-64B89586-5862-41F8-8614-644E690A69BD","etm-AC8FF4AE-F796-4E21-8137-A431DD23AD15","etm-3C11FEED-0B5E-4AA5-8ED1-ADAFF1CDF4E0"],"EXCLUDE":["etm-f6e0d09943a943d383e81b5f64a3956c","etm-ececc448f2f54f0e87cdf5558856b275"],"AND":["etm-081db853a9a148959ca49c264f8ee5be"]},"featuredIds":[]},"collectionId":"653166","resultPerPage":50.0,"filters":[{"facetId":"guidetm89fc8b9c4e134c7ca79fd2f5f2b4ed04","field":"stm_10309_th","type":"hierarchical","basePath":"Technology","displayName":"Technology","deprecated":false,"rootFilter":"guidetm89fc8b9c4e134c7ca79fd2f5f2b4ed04","rootPath":["Technology","Intel® Technologies","Intel® FPGA Technologies"],"position":0},{"facetId":"guidetm83741EA404664A899395C861EDA3D38B","field":"stm_10385_th","type":"hierarchical","basePath":"Primary Content Tagging","displayName":"ตระกูลอุปกรณ์ FPGA","deprecated":false,"rootFilter":"guidetm83741EA404664A899395C861EDA3D38B","rootPath":["Primary Content Tagging","Intel® FPGA","อุปกรณ์ที่ตั้งโปรแกรมได้ Intel®"],"position":1},{"facetId":"lastupdated","type":"lastupdated","deprecated":true,"name":"lastupdated","position":2}],"coveoRequestHardLimit":"1000","accessDetailsPagePath":"/content/www/us/en/secure/design/internal/access-details.html","collectionGuids":["etm-081db853a9a148959ca49c264f8ee5be"],"cardView":false,"sorting":"Newest","defaultImagesPath":"/content/dam/www/public/us/en/images/uatable/default-icons","coveoMaxResults":5000,"coveoSplitSize":500,"fpgaFacetRootPaths":"{\"fpgadevicefamily\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Programmable Devices\"],\"quartusedition\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software\"],\"quartusaddon\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software - Add-ons\"],\"fpgaplatform\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® FPGA Platforms\"]}","newWrapperPageEnabled":true,"descendingSortingForNumericalFacetsName":"[\"Intel® Quartus® Prime Pro Edition\",\"Intel® Quartus® Prime Lite Edition\",\"Intel® Quartus® Prime Standard Edition\",\"Quartus® II Subscription Edition\",\"Quartus® II Web Edition\"]","columnsConfiguration":{"idColumn":false,"dateColumn":false,"versionColumn":false,"contentTypeColumn":false,"columnsMaxSize":0},"dynamicColumnsConfiguration":[{"name":"DynamicColumn_id","type":"id","gtv":"ID","width":60,"selected":true},{"name":"DynamicColumn_date","type":"date","gtv":"วันที่","width":60,"selected":true},{"name":"DynamicColumn_version","type":"version","gtv":"เวอร์ชั่น","width":135,"selected":true}],"updateCollateralMetadataEnabled":true,"relatedAssetsEnable":true,"disableExpandCollapseAll":false,"enableRelatedAssetsOnExpandAll":false}

เนื้อหาในหน้านี้เป็นการผสมผสานระหว่างการแปลเนื้อหาต้นฉบับภาษาอังกฤษโดยมนุษย์และคอมพิวเตอร์ เนื้อหานี้จัดทำขึ้นเพื่อความสะดวกของคุณและเพื่อเป็นข้อมูลทั่วไปเท่านั้นและไม่ควรอ้างอิงว่าสมบูรณ์หรือถูกต้อง หากมีความขัดแย้งใด ๆ ระหว่างเวอร์ชันภาษาอังกฤษของหน้านี้กับคำแปล เวอร์ชันภาษาอังกฤษจะมีผลเหนือกว่าและควบคุม ดูเวอร์ชันภาษาอังกฤษของหน้านี้