get_ports (::quartus::sdc)

The following table displays information for the get_ports Tcl command:

Tcl Package and Version	Belongs to ::quartus::sdc 1.5
Syntax	`get_ports [-h \| -help] [-long_help]` `[-nocase]` `[-nowarn]` `[` <filter> `]`
Arguments	`-h \| -help`		Short help
	`-long_help`		Long help with examples and possible return values
	`-nocase`		Specifies case-insensitive node name matching
	`-nowarn`		Do not issue warning messages about unmatched patterns
	<filter>		Valid destinations (string patterns are matched using Tcl string matching)
Description	Returns a collection of ports (design inputs and outputs) in the design. The filter for the collection is a Tcl list of wildcards, and must follow standard Tcl or Timing Analyzer-extension substitution rules. See help for the use_timing_analyzer_style_escaping command for details.
Example Usage	project_open chiptrip create_timing_netlist # Get all ports starting with "In". set ports [get_ports In*] foreach_in_collection port $ports { puts [get_port_info -name $port] } delete_timing_netlist project_close
Return Value	Code Name	Code	String Return
	TCL_OK	0	INFO: Operation successful
	TCL_ERROR	1	ERROR: Timing netlist does not exist. Use create_timing_netlist to create a timing netlist.