set_active_clocks (::quartus::sdc_ext)
The following table displays information for the set_active_clocks Tcl command:
| Tcl Package and Version | Belongs to ::quartus::sdc_ext 1.0 |
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| Syntax | set_active_clocks [-h | -help] [-long_help]<clocks> | ||
| Arguments | -h | -help | Short help | |
| -long_help | Long help with examples and possible return values | ||
| <clocks> | List or collection of clocks | ||
| Description |
Sets the list of active clocks for timing analysis. All other clocks not in the list or collection are considered inactive. Timing analysis is only performed on active clocks. All clocks are active by default. Generated clocks that are generated from inactive clocks are considered inactive. Therefore, to make a generated clock active, specify both the parent and generated clock when calling set_active_clocks. To reset all clocks to active, call "set_active_clocks *" or "set_active_clocks [all_clocks]". The set_active_clocks command does not affect all reports. For example, inactive clocks are still reported by report_clocks, report_clock_transfers, and similar commands. Avoid using the set_active_clocks command if your design targets a HardCopy series device or if you plan to migrate your design to a HardCopy series device. |
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| Example Usage |
# Only analyze clk1 set_active_clocks [get_clocks clk1] # Only analyze clk2 set_active_clocks [get_clocks clk2] # Analyze all clocks set_active_clocks [all_clocks] |
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| Return Value | Code Name | Code | String Return |
| TCL_OK | 0 | INFO: Operation successful | |
| TCL_ERROR | 1 | ERROR: Timing netlist does not exist. Use create_timing_netlist to create a timing netlist. | |