ID:13921 VHDL synthesis attribute or directive warning at <location>: ignored synthesis attribute or directive "<name>" because it is applied to object of <name> type

CAUSE: In a VHDL Design File (.v) at the specified location, you applied the specified synthesis attribute or directive to an object of the specified type. However, the synthesis attribute or directive does not support objects of this type; as a result, Quartus Prime Integrated Synthesis ignored the synthesis attribute or directive.

ACTION: Make sure the synthesis attribute or directive applied to the object supports the object type. If necessary, remove the synthesis attribute or directive.