ID:17022 Ignored Logic Cell Insertion logic option between "<name>" and "<name>" -- Logic Cell Insertion can be assigned only between data signals that do not have a global signal assignment

CAUSE: You turned on the Logic Cell Insertion logic option to add logic cell buffers between the specified nodes in the design. However, you assigned the logic option to nodes that either have a global path between them or are not data signals.

ACTION: Assign the Logic Cell Insertion logic option to data signals that do not have a global signal assignment.