ID:23655 There are <num_landmark_opt> M20K_CE_CONTROL_FOR_PR assignments on input ports of partition "<partition>".

CAUSE: Only one M20K_CE_CONTROL_FOR_PR assignment should be on an input port of each PR partition for CE insertion (M20K) on Intel Agilex devices.

ACTION: Modify the design to use only one M20K_CE_CONTROL_FOR_PR assignment on an input port of each PR partition in the PR region.