ID:13678 VHDL error at <location>: invalid range constraint in expression

CAUSE: In a VHDL Design File (.vhd) at the specified location, you used a range constraint in an expression. However, the expression cannot contain a range constraint, or cannot contain a range constraint in the context in which the expression is being used. For example, you may have used a range constraint for an integer type.

ACTION: Remove the range constraint, or change the expression so it can contain a range constraint.