ID:13963 VHDL Default Binding Indication error at <location>: can't bind component formal "<name>" to corresponding formal on entity "<name>" using default binding rules

CAUSE: Quartus Prime Integrated Synthesis attempted to use default binding rules to bind the specified component formal to the corresponding formal on the specified entity. However, the formals do not have compatible values.

ACTION: Check the type declarations for the specified port on both the component and the entity. If necessary, specify an explicit binding indication to resolve the conflict.