ID:203004 No file name or illegal path specified for Verilog Quartus Mapping File -- can't save intermediate synthesis results

CAUSE: You directed the Quartus Prime software to save synthesis results to a LOGICLOCK_INCREMENTAL_COMPILE_FILE keyword.

ACTION: Specify a VQM File name. To avoid receiving this message in the future, Intel recommends using the Settings dialog box to specify synthesis options, rather than editing the QSF manually.