ID:13073 The tri-state buffer "<name>" feeding the pin "<name>" directly or indirectly feeds itself.

CAUSE: The specified tri-state buffer directly or indirectly feeds its own data. Such a loop is not legal. This can happen if the tri-state buffer has its data input connected to the same bidirectional pin that it feeds. For example, the following Verilog design gives this error:

		module test1 (oe, bidir); 
		input oe; 
		inout bidir; 
		wire tri_wire; 
		assign tri_wire = bidir; 
		assign bidir = oe ? tri_wire : 1'bZ; 
		endmodule