ID:15475 enable0 input port of SERDES receiver or transmitter atom "<name>" must be driven by a clock output port of the fast PLL

CAUSE: The specified SERDES receiver or transmitter atom has an enable0 input port that can be driven only by a clock output port of a fast PLL. If you are using the MegaWizard Plug-In Manager (Tools menu), this error usually occurs when an external PLL has been selected for the SERDES receiver or transmitter atom, but the PLL has not been configured for LVDS.

ACTION: Modify the design so that the enable0 input port of the SERDES receiver or transmitter atom has a valid source.