ID:15394 WYSIWYG primitive "<name>" has <name> port that must have the same CLOCK parameter as the other pipeline register nodes in the DSP block slice

CAUSE: The specified port of the specified WYSIWYG primitive has an illegal CLOCK parameter. The specified port must have the same CLOCK parameter as the other pipeline register nodes in the DSP block slice.

ACTION: Remove the pipeline register of the specified port of the specified WYSIWYG DSP block output, or make sure the pipeline register of the specified port uses the same CLOCK as the other pipeline register nodes in the DSP block slice.