# DSP block Definition

DSP blocks allow to efficiently implement multiply, multiply-add, and multiply-accumulate functions. DSP blocks contain input shift registers to implement digital filter applications, including FIR filters and IIR filters, and can implement up to eight 9 x 9 multipliers, six 12 x 12 multipliers, four 18 x 18 multipliers, or two 36 x 36 multipliers. The multipliers in the DSP block can optionally feed an adder/subtractor or accumulator within the block.

The DSP block operates in the following modes:

Operation mode | Definition |
---|---|

Simple Multiplier | A single 9-bit, 12-bit, 18-bit, 27-bit, or 36-bit multiplier. |

Multiply Accumulator | A single 18-bit multiplier feeding an accumulator. |

Two-Multipliers Adder | Two 9-bit or 18-bit multipliers feeding an adder. |

Four-Multipliers Adder | Four 9-bit or 18-bit multipliers feeding an adder. |