App Note: Intel® ICH Family Real Time Clock Under Test Conditions

Background: External Real Time Clock (RTC) Circuit

Intel chipsets using an Intel I/O Controller Hub family component use a crystal circuit to generate a low-swing 32 kHz input sine wave. This input is amplified and driven back to the crystal circuit via the RTCX2 signal. Internal to the ICHn (any member of the ICH family), the RTCX1 signal is amplified to drive internal logic as well as generate a free running full swing clock output for system use. This output pin of the ICHn is called SUSCLK. The crystal network employs R1, C1, and C2 to generate the 32.768 kHz sine wave. Actual values for these components are dependent on the crystal component specification, trace lengths on the motherboard, and the crystal’s load capacitance. For ICH9, the SRTCRST# signal is used to reset the manageability register bits in the RTC well when the onboard battery is removed. The external capacitor and the external resistor between SRTCRST# and VccRTC are to create a root cause (RC) time delay, such that SRTCRST# will go high some time after the battery voltage is valid. The RC time delay should be in the range of 18 ms – 25 ms.