® Intel I/O Controller Hub 6 (ICH6) Family

Datasheet ® For the Intel 82801FB ICH6, 82801FR ICH6R and 82801FBM ICH6-M I/O Controller Hubs January 2005 Document Number: 301473-002 ® INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. ® ® ® The Intel 82801FB ICH6, Intel 82801FR ICH6R, and Intel 82801FBM ICH6-M components may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. 2 2 I C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I C bus/protocol and was developed by Intel. 2 Implementations of the I C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. Alert on LAN is a result of the Intel-IBM Advanced Manageability Alliance and a trademark of IBM. Intel, Intel SpeedStep and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2004-2005, Intel Corporation 2 ® Intel I/O Controller Hub 6 (ICH6) Family Datasheet Contents Contents 1 2 3 4 5 Introduction .............................................................................................................................43 1.2 Overview.............................................................................................................................46 Signal Description.................................................................................................................53 2.1 Direct Media Interface (DMI) to Host Controller..................................................................56 2.2 PCI Express* ......................................................................................................................56 2.3 Link to LAN Connect...........................................................................................................57 2.4 EEPROM Interface .............................................................................................................57 2.5 Firmware Hub Interface ......................................................................................................57 2.6 PCI Interface.......................................................................................................................58 2.7 Serial ATA Interface............................................................................................................60 2.8 IDE Interface.......................................................................................................................61 2.9 LPC Interface......................................................................................................................62 2.10 Interrupt Interface ...............................................................................................................63 2.11 USB Interface .....................................................................................................................64 2.12 Power Management Interface.............................................................................................65 2.13 Processor Interface.............................................................................................................67 2.14 SMBus Interface .................................................................................................................68 2.15 System Management Interface...........................................................................................68 2.16 Real Time Clock Interface ..................................................................................................69 2.17 Other Clocks .......................................................................................................................69 2.18 Miscellaneous Signals ........................................................................................................69 ® 2.19 AC ’97/Intel High Definition Audio Link.............................................................................70 2.20 General Purpose I/O...........................................................................................................71 2.21 Power and Ground..............................................................................................................73 2.22 Pin Straps ...........................................................................................................................74 2.22.1 Functional Straps...................................................................................................74 2.22.2 External RTC Circuitry ...........................................................................................76 2.22.3 Power Sequencing Requirements .........................................................................76 2.22.3.1 V5REF / Vcc3_3 Sequencing Requirements .........................................76 2.22.3.2 3.3 V/1.5 V Standby Power Sequencing Requirements ........................76 2.22.3.3 3.3 V/2.5 V Power Sequencing Requirements.......................................77 2.22.3.4 Vcc1_5/V_Processor_IO Power Sequencing Requirements .................77 Pin States..................................................................................................................................79 3.1 Integrated Pull-Ups and Pull-Downs...................................................................................79 3.2 IDE Integrated Series Termination Resistors .....................................................................80 3.3 Output and I/O Signals Planes and States .........................................................................80 3.4 Power Planes for Input Signals...........................................................................................89 System Clock Domains.......................................................................................................95 Functional Description........................................................................................................97 5.1 PCI-to-PCI Bridge (D30:F0)................................................................................................97 5.1.1 PCI Bus Interface...................................................................................................97 5.1.2 PCI Bridge As an Initiator ......................................................................................97 5.1.2.1 Memory Reads and Writes ....................................................................98 ® Intel I/O Controller Hub 6