Industrial Functional Safety
Reduce Time and Effort for Functional Safety Certification
To simplify and speed up your safety certification process, Intel worked closely with TÜV Rheinland* to provide an IEC61508 certified Functional Safety Data Package, which includes:
- Safety Manuals for Intel® FPGAs and Intel® Quartus® Prime Design Software
- Diagnostic and standard intellectual property (IP) such as the Nios® II processor
- FPGA design flows including a safety separation design flow
- Development tools, including the Intel® Quartus® Prime Design Software
TÜV-Qualified Safety Data Package Contents
TÜV-Qualified FPGAs for Functional Safety Designs
Our certified Safety Integrity Level 3 (SIL3) Functional Safety Data Package shortens IEC 61508 development time and reduces certification risks in safety-critical industrial applications, such as industrial servo and inverter drives, safety devices, and automation controllers. The Safety Separation Design Flow retains the FPGA benefit of quick upgrades/bug fixes while reducing the need for full design recertification. Our customers have been using the package since 2010 for industrial applications certified for IEc61508. The following figure shows a typical dual-channel SIL3 industrial "safe" system implemented with two FPGAs. Contact your local Intel® FPGA representative for more information and access to the Functional Safety Data Packages, or example designs.
Typical Dual-Channel SIL3 Industrial "Safe" System Implemented with Two FPGAs
Features
The TÜV Rheinland* certified functional safety data package includes
- Guidelines on how to use the approved Intel® FPGA development methodology and tools to design IEC 61508 certifiable systems
- FMEDA tool, allowing calculation of failure rates and safe failure fraction (SFF) for FPGA designs
- Safety Manuals, showing how to use the Intel® Quartus® Prime Design Software and develop FPGA systems according to IEC 61508
- Diagnostic IP with IEC 61508 standard documentation and source code to monitor the integrity of the FPGA, memory, and clock signals
- Latest FPGA device reliability reports
- TÜV Rheinland* qualification certificate
Design Example
Efficient Motor Control Designs with Intel® FPGAs and SoCs
Designing motor control and motion control systems with Intel® FPGAs and SoCs can result in significant reduction in overall cost of ownership through:
System Integration: Lower bill of materials (BOM), power consumption, and reliability challenges by integrating industrial networking, functional safety, encoder, and power stage interfaces and digital signal processing (DSP) control algorithms in a single device.
Scalable Performance: Use a single scalable platform across entire product lines. Achieve higher performance with faster and more advanced control loops.
Functional Safety: Reduce compliance time and effort. Intel is the first FPGA supplier to obtain qualification of our devices and tools under the Machinery Directive safety standard IEC 61508.
The Intel® Motor Control Development Framework enables you to easily create integrated, high-performance drive-on-a-chip motor control designs with Intel® FPGAs and SoCs. The framework comprises reference designs, software libraries, intellectual property (IP) cores, and a portfolio of motor control hardware platforms supporting the development of motor control systems in a single FPGA.
Partners
SafeFlex, Safety Reference Board
The SafeFlex functional safety reference board and associated reference designs are designed by Intel and NewTec to reduce customer design effort in safety designs requiring IEC 61508 certification up to SIL3 and IEC 13849 PLe Cat 4. The board includes a reference design of a safety application, alongside documents describing the steps required to bring safety designs from initial development to end production. Contact NewTec for more information and to purchase the SafeFlex board.
Functional Safety Data Package (FSDP) Ordering Process
Step 1: Please contact your local Intel sales representative to submit a purchasing order
Functional Safety Data Package ordering codes:
IP_ABG_SAFETYDP - US$10,000
IPR_ABG_SAFETYDP (Upgrade from previous version) - US$2,500
FSDP V1.0
- IP_ABG_SAFETYDP1
- IPR_ABG_SAFETYDP1
FSDP V2.0
- IP_ABG_SAFETYDP2
- IPR_ABG_SAFETYDP2
FSDP V3.0
- IP_ABG_SAFETYDP3
- IPR_ABG_SAFETYDP3
FSDP V4.0
- IP_ABG_SAFETYDP4
- IPR_ABG_SAFETYDP4
FSDP V5.0
- IP_ABG_SAFETYDP5
- IPR_ABG_SAFETYDP5
Step 2: You will receive an email containing web access information once the processing order is processed, including logon information.
Step 3: Accept the license agreement & download the Functional Safety Data Package from My Intel. After accepting the license agreement, you will be able to download the FDSP.
Resources
White Papers
- Developing Functional Safety Systems with TÜV-Qualified FPGAs
- Qualified Functional Safety Data Package
- Reducing Steps to Achieve Safety Certification
- FPGA-based Safety Separation Design Flow for Rapid IEC 61508 Certification
- Reducing Steps to Achieve Safety Certification
- 8 Reasons to Use FPGAs in IEC 61508 Functional Safety Applications
- A Validated Methodology for Designing Safe Industrial Systems on a Chip